An ADC is a tiny piece of technology present in almost every electronic piece of equipment that converts analog signals (like a radio wave) to a digital signal. The ADC created by BYU professor Wood Chiang, Ph.D. student Eric Swindlehurst and their colleagues at Brigham Young University consumes only 21 milli-Watts of power at 10GHz for ultra-wideband wireless communications; current ADCs consume hundreds of milli-Watts or even Watts of power at comparable speeds. The BYU-made ADC has the highest power efficiency currently available globally, a record it holds by a substantial margin.
The central challenge facing researchers like Chiang is that increasingly higher bandwidths within communications system devices means circuits that consume more power. Chiang, Swindlehurst and their team set out to solve the problem by focusing on a key part of the ADC circuit called the DAC, which is a central piece that stands for the exact reverse of ADC: digital-to-analog converter.
Here's a broad explanation of what they did:
They made the converter faster and more efficient by reducing the loading from the DAC by scaling both the capacitor parallel plate area and spacing. They also grouped unit capacitors differently from the conventional way, grouping together unit capacitors that are part of the same bit in the DAC rather than having them be interleaved throughout. Doing so lowered the bottom-plate parasitic capacitance by three times, significantly lowering power consumption while increasing speed.
Finally, they used a bootstrapped switch, but improved on it by making it dual path where each path can be independently optimized. This method increases the speed but doesn't require additional hardware because it involves splitting existing devices and making route changes in the circuit.
The project, sponsored by the Ministry of Science in Taiwan and a consortium of technology companies, took four years to complete—three years to design the chip and one year to test it. The team, which included collaborators from National Yang Ming Chiao Tung University in Taiwan and the University of California, Los Angeles, published details of the project in IEEE Journal of Solid-State Circuits earlier this year, with Swindlehurst serving as principal author.
Read More: https://techxplore.com/news/2021-05-world-power-efficient-high-speed-adc-microchip.html
The central challenge facing researchers like Chiang is that increasingly higher bandwidths within communications system devices means circuits that consume more power. Chiang, Swindlehurst and their team set out to solve the problem by focusing on a key part of the ADC circuit called the DAC, which is a central piece that stands for the exact reverse of ADC: digital-to-analog converter.
Here's a broad explanation of what they did:
They made the converter faster and more efficient by reducing the loading from the DAC by scaling both the capacitor parallel plate area and spacing. They also grouped unit capacitors differently from the conventional way, grouping together unit capacitors that are part of the same bit in the DAC rather than having them be interleaved throughout. Doing so lowered the bottom-plate parasitic capacitance by three times, significantly lowering power consumption while increasing speed.
Finally, they used a bootstrapped switch, but improved on it by making it dual path where each path can be independently optimized. This method increases the speed but doesn't require additional hardware because it involves splitting existing devices and making route changes in the circuit.
The project, sponsored by the Ministry of Science in Taiwan and a consortium of technology companies, took four years to complete—three years to design the chip and one year to test it. The team, which included collaborators from National Yang Ming Chiao Tung University in Taiwan and the University of California, Los Angeles, published details of the project in IEEE Journal of Solid-State Circuits earlier this year, with Swindlehurst serving as principal author.
Read More: https://techxplore.com/news/2021-05-world-power-efficient-high-speed-adc-microchip.html
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